Programmable clock dividers or frequency dividers of various conventional configurations have been used in numerous applications though out the art of digital circuitry. One of the more commonly desired characteristics of digital circuitry is high speed operation. High speed phase-locked loops (PLLs) are considered to be a basic element of digital design and are widely employed in radio, telecommunications, computers and other electronic applications. PLLs can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.
In general, a clock divider is basically a counter. Flip-flops are commonly used to keep track of the number of clock pulses applied to the counter. Although other types of flip-flops can be uses, D flip-flops are basic building blocks of sequential logic circuits, and are often used to construct counters. D flip-flops have a D (data) input and a clock (CLK) input and outputs Q and Q_bar. Counters are sequential logic devices that are activated or triggered by an external timing pulse or clock signal. A counter can be constructed to operate as a synchronous circuit or an asynchronous circuit. With synchronous counters, all the data bits change synchronously with the application of a clock signal. Whereas an asynchronous counter is independent of the input clock so the data bits change state at different times one after the other.
Consequently, synchronous counters tend to consume much more power than asynchronous counters. A type of asynchronous counter is a ripple counter. In a ripple counter, only the first flip-flop is clocked by the clock signal. All subsequent flip-flops are clocked by the output of the preceding flip-flop which enables the output clock pulses to ripple through each of the flip-flops. Ripple counters can be used for frequency divider, time measurement, frequency measurement, distance measurement and also for generating square waveforms.
Counters are sequential logic devices that follow a predetermined sequence of counting states that are triggered by an external clock signal. The number of states or counting sequences through which a particular counter advances before returning back to its original starting state is call the modulus (MOD). The modulus is the number of states a counter counts and is the dividing number of the counter. The MOD of a ripple counter or asynchronous counter is 2n if n is the number of flip-flops being used in the counter. For example, a 4-bit counter has four flip flops and a range of counts from binary 0000 to 1111 (24-1). A ripple counter may count up or count down depending on designer preference. Asynchronous counters like the ripple counter are slower than synchronous counters because of the propagation delay in the transmission of the pulses from flip-flop to flip-flop. However, synchronous counters consume much more power than their asynchronous counterparts.
A challenge with ripple counters occurs when the counter reaches the count limit, the ripple counter has to be reset and loaded with another count value with minimum delays. Accordingly, there is a need for a ripple counter that minimizes delays to reset and initiate a load count for another operation that overcomes delays and disadvantages of current ripple counters.